Multiprocessor digital computer system with address modification during program execution
Abstract
Abstract AN ADDRESSABLE MEMORY UNIT IS SHARED BY TWO PROCESSORS, EACH INCLUDING A SOURCE OF MEMORY ADDRESSES. THE MEMORY ADDRESS VALUES IN THE FIRST AND SECOND PROCESSORS ARE AT LEAST IN PART THE SAME. IN THE COURSE OF THE OPERATION OF THE PROCESSORS, THE ADDRESS VALUES ARE COUPLED TO THE MEMORY UNIT. THE ADDRESS VALUES ARE COUPLED TO PROCESSORS ARE MODIFIED BY ONE CONSTANT AMOUNT AND THE ADDRESS VALUES FROM THE OTHER PROCESSOR ARE MODIFIED BY ANOTHER CONSTANT AMOUNT TO PRODUCE MUTUALLY EXCLUSIVE ADDRESS VALUES. PREFERABLY, THE MODIFIED ADDRESS VALUES ARE COMPARED WITH A LIMIT VALUE PRIOR TO THE INITIATION OF THE MEMORY READ-WRITE CYCLE. MOST ADVANTAGEOUSLY, THE MEMORY UNIT IS DIVIDED INTO MODULES ASSIGNED TO ONE OR THE OTHER OF THE PROCESSORS AND ONLY THE PORTION OF THE MEMORY ADDRESS VALUES DESIGNATING THE MODULE ARE MODIFIED.
Inventors
- 👤 Erwin A Hauck
- 👤 Jacob F Vigil
Bibliographic Details
Claims Analysis
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