US3439347A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Sub-word length arithmetic apparatus
Assignee: General Electric Co
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Filing: 1966-12-13
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Granted: 1969-04-15
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Expires: 1986-12-13
Abstract
No abstract record available.
Inventors
- 👤 Larry A Goshorn
- 👤 Sherril A Harmon
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-23 08:19
CPC Classifications
G; G06; G06F; G06F9/00; G06F9/06; G06F9/30; G06F9/30003; G06F9/30007; G06F9/30018
Claims Analysis
Total Claims: 2
Claim 1
Independent Claim
178 words
AN INFORMATION PROCESSING SYSTEM INCLUDING: A FIRST BINARY REGISTER; MEANS RESPONSIVE TO PREDETERMINED SIGNALS DECORDED FROM A WORD TEMPORARILY STORED IN SAID FIRST BINARY REGISTER TO GENERATE A SIGNAL; SECOND THIRD AND FOURTH BINARY REGISTERS IN SYNCHRONISM; MEANS RESPONSIVE TO SAID SIGNAL FOR SERIALLY SHIFTINGG SAID SECOND, THIRD AND FOURTH BINARY REGISTERS IN SYNCHRONISM; MEANS RESPONSIVE TO SAID SIGNAL AND TO A FIRST STATE OF A TERMINAL ORDER BISTABLE DEVICE OF SAID SECOND BINARY REGISTER FOR GATING THE INFORMATION REPRESENTED BY THE STATE OF A FIRST TERMINAL ORDER BISTABLE DEVICE OF SAID THIRD REGISTER TO A FIRT INPUT OFF SAID FULL ADDER; MEANS RESPONSIVE TO SAID SIGNAL AND TO A SECOND STATE OF SAID TERMINAL ORDER BISTABLE DEVICE OF SAID SECOND BINARY REGISTER FOR GATING THE INFORMATION REPRESENTED BY THE STATE OF A TERMINAL ORDER BISTABLE DEVICE OF SAID FOURTH BINARY REGISTER TO A SECOND INPUT OF SAID FULL ADDER; AND GATING MEANS RESPONSIVE TO SAID SIGNAL FOR SHIFTING OUTPUT SIGNALS FROM SAID FULL ADDER SERIALLY INTO A SECOND TERMINAL ORDER BISTABLE DEVICE OF SAID THIRD BINARY REGISTER.
Claim 2
Dependent Claim
178 words
AN INFORMATION PROCESSING SYSTEM INCLUDING: A FIRST BINARY REGISTER; MEANS RESPONSIVE TO PREDETERMINED SIGNALS DECORDED FROM A WORD TEMPORARILY STORED IN SAID FIRST BINARY REGISTER TO GENERATE A SIGNAL; SECOND THIRD AND FOURTH BINARY REGISTERS IN SYNCHRONISM; MEANS RESPONSIVE TO SAID SIGNAL FOR SERIALLY SHIFTINGG SAID SECOND, THIRD AND FOURTH BINARY REGISTERS IN SYNCHRONISM; MEANS RESPONSIVE TO SAID SIGNAL AND TO A FIRST STATE OF A TERMINAL ORDER BISTABLE DEVICE OF SAID SECOND BINARY REGISTER FOR GATING THE INFORMATION REPRESENTED BY THE STATE OF A FIRST TERMINAL ORDER BISTABLE DEVICE OF SAID THIRD REGISTER TO A FIRT INPUT OFF SAID FULL ADDER; MEANS RESPONSIVE TO SAID SIGNAL AND TO A SECOND STATE OF SAID TERMINAL ORDER BISTABLE DEVICE OF SAID SECOND BINARY REGISTER FOR GATING THE INFORMATION REPRESENTED BY THE STATE OF A TERMINAL ORDER BISTABLE DEVICE OF SAID FOURTH BINARY REGISTER TO A SECOND INPUT OF SAID FULL ADDER; AND GATING MEANS RESPONSIVE TO SAID SIGNAL FOR SHIFTING OUTPUT SIGNALS FROM SAID FULL ADDER SERIALLY INTO A SECOND TERMINAL ORDER BISTABLE DEVICE OF SAID THIRD BINARY REGISTER.
References Cited (Backward Citations)
US3109162A
Cited
US3161763A
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US3238508A
Cited
US3319228A
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US3331954A
Cited
US3343139A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1972-04-14 | 1972-10-14 | 1973-04-15 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1976-04-14 | 1976-10-14 | 1977-04-15 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1980-04-14 | 1980-10-14 | 1981-04-15 | $7700.00 | Window Closed / Lapsed |