Input/output control for a digital computing system

Claim 1

IN A COMPUTING SYSTEM IN WHICH DATA IS TRANSFERRED BETWEEN AT LEAST ONE MEMORY MODULE AND A PLURALITY OF PERIPHERAL INPUT/OUTPUT UNITS IN RESPONSE TO AN INITIATING CONTROL SIGNAL FROM A PROCESSOR, A MULTIPLEX CONTROL UNIT FOR TRANSFERRING DATA TO AND FROM THE PLURALITY OF PERIPHERAL UNITS ON A TIME SHARING BASIS, SAID CONTROL UNIT COMPRISING A BUFFER MEMORY FOR STORING A PLURALITY OF WORDS, THE WORD STORAGE CAPACITY BEING LESS THAN THE NUMBER OF PERIPHERAL UNITS, AN ASSOCIATIVE MEMORY FOR ADDRESSING THE BUFFER MEMORY, MEANS RESPONSIVE TO SAID INITIATING CONTROL SIGNAL FOR STORING AN ADDRESS CORRESPONDING TO A PARTICULAR PERIPHERAL UNIT IN THE ASSOCIATIVE MEMORY AND ACTIVATING THE CORRESPONDING PERIPHERAL UNIT, MEANS ASSOCIATED WITH EACH PERIPHERAL UNIT FOR GENERATING AN ACCESS SIGNAL WHEN IT IS READY TO RECEIVE OR SEND A DATA CHARACTER, MEANS RESPONSIVE TO THE ACCESS SIGNAL FROM A PARTICULAR PERIPHERAL UNIT FOR ADDRESSING THE ASSOCIATIVE MEMORY TO SELECT THE CORRESPONDING LOCATION IN THE BUFFER MEMORY, AND MEANS RESPONSIVE TO THE SELECTION OF THE LOCATION IN THE BUFFER MEMORY FOR INITIATING TRANSFER OF A CHARACTER BETWEEN THE PARTICULAR PERIPHERAL UNIT AND THE SELECTED LOCATION IN THE BUFFER MEMORY.