Information handling apparatus

Claim 1

A DATA PROCESSING APPARATUS CAPABLE OF COLLECTIVELY TRANSFERRING INFORMATION A CHARACTER AT A TIME DURING SUCCESSIVE OPERATING INTERVALS BETWEEN A MEMORY UNIT AND A PLURALITY OF PERIPHERAL DEVICES OVER A COMMON DISTRIBUTION CIRCUIT AND FOR SIMULTANEOUSLY PROCESSING INSTRUCTIONS OF AN OPERATING ROUTINE ON A TIME-SHARING BASIS, SAID APPARATUS COMPRISING A MEMORY PORTION FOR STORING SAID INFORMATION AND THE INSTRUCTIONS OF SAID OPERATING ROUTINE, AN ARITHMETIC UNIT, MEANS OPERATIVELY CONNECTING SAID ARITHMETIC UNIT TO SAID MEMORY PORTION, A TRAFFIC CONTROL PORTION CONNECTED TO BOTH SAID MEMORY PORTION AND SAID ARITHMETIC UNIT, SAID TRAFFIC CONTROL PORTION BEING FURTHER CONNECTED TO A PLURALITY OF PERIPHERAL CONTROL UNITS OVER SAID COMMON DISTRIBUTION CIRCUIT, EACH OF SAID PLURALITY OF PERIPHERAL CONTROL UNITS HAVING ASSOCIATED THEREWITH AT LEAST ONE OF SAID PLURALITY OF PERIPHERAL DEVICES, SAID TRAFFIC CONTROL CIRCUIT COMPRISING A SEQUENCING CIRCUIT HAVING AN OPERATIVE CYCLE CONSISTING A PLURALITY TO TIME INTERVALS, MEANS ADAPTED TO BE ENERGIZED WHILE SAID SEQUENCING CIRCUIT IS OPERATIVE IN ONE OF SAID TIME INTERVALS TO ACTIVATE A PARTICULAR ONE OF SAID PLURALITY OF PERIPHERAL CONTROL UNITS, MEANS RESPONSIVE TO SAID ACTIVATION SIGNAL TO FURTHER ACTIVATE SAID AT LEAST ONE OF SAID PERIPHERAL DEVICES ASSOCIATE WITH SAID PARTICULAR ONE OF SAID PERIPHERAL CONTROL UNITS AND TO RESERVE THERETO A PARTICULAR ONE OF SAID TIME INTERVALS DURING SUBSEQUENT SEQUENCING CYCLES, SAID TRAFFIC CONTROL PORTION BEING FURTHER COMPRISED OF A PLURALITY OF PAIRS OF REGISTERS, EACH OF SAID PAIRS OF REGISTERS BEING FURTHER ASSOCIATED WITH A PARTICULAR ONE OF SAID PLURALITY OF TIME INTERVALS, THE FIRST ONE OF A PAIR OF SAID REGISTERS CONNECTED TO SAID MEMORY UNIT FOR STORING A SIGNAL REPRESENTATION IDENTIFYING THE STARTING ADDRESS OF AN AREA OF MEMORY TO BE REFERENCED, SAID AREA OF MEMORY COMPRISING A VARIABLE NUMBER OF SEQUENTIAL STORAGE LOCATIONS WITHIN SAID MEMORY UNIT, THE SECOND ONE OF SAID PAIR OF REGISTERS CONNECTED TO SAID MEMORY UNIT FOR STORING A DIGITAL REPRESENTATION IDENTIFYING THE ADDRESS OF A PARTICULAR ONE OF SAID PLURALITY OF SEQUENTIAL STORAGE LOCATIONS WITHIN SAID AREA OF MEMORY TO BE REFERENCED, AND MEANS CONNECTED TO BE RESPONSIVE TO CERTAIN CONDITIONS WITHIN SAID PARTICULAR ONE OF SAID PLURALITY OF PERIPHERAL DEVICES TO INITIATED THE TRANSFER OF A UNIT OF INFORMATION BETWEEN SAID PERIPHERAL DEVICE AND THE LOCATION IN MAIN MEMORY AS IDENTIFIED BY A CONTENT OF SAID SECONT REGISTER DURING SAID PARTICULAR ONE OF SAID TIME INTERVALS AND TO MODIFY THE DIGITAL REPRESENTATION STORED IN SAID SECOND REGISTER SO AS TO IDENTIFY THE LOCATION IN MAIN MEMORY FROM WHENCE THE SUCCEEDING TRANSFER IS TO BE INITIATED.