Clocked set-reset flip-flop

Claim 1

A CLOCKED BISTABLE MULTIVIBRATOR CIRCUIT HAVING SET AND RESET CONDUCTIVE STATES, SAID CIRCUIT INCLUDING IN COMBINATION FIRST AND SECOND EMITTER-FOLLOWER TRANSISTORS AND FIRST AND SECOND HOLDING TRANSISTORS, SAID FIRST AND SECOND HOLDING TRANSISTORS CONNECTED TO A COMMON CURRENT OUTPUT TERMINAL, A COMMON EMITTER RESISTANCE CONNECTED BETWEEN SAID COMMON CURRENT OUTPUT TERMINAL AND A VOLTAGE SUPPLY MEANS, MEANS CROSS-COUPLING SAID FIRST AND SECOND EMITTER-FOLLOWER TRANSISTORS TO SAID SECOND AND FIRST HOLDING TRANSISTOR, RESPECTIVELY, AND PROVIDING A CONDUCTIVE PATH IN SAID MULTIVIBRATOR DURING THE ALTERNATE CONDUCTION OF SAID FIRST AND SECOND HOLDING TRANSISTORS, SAID BISTABLE MULTIVIBRATOR HAVING A FIRST STABLE SET STATE WHEREIN SAID FIRST HOLDING TRANSISTOR IS CONDUCTING AND SAID SECOND HOLDING TRANSISTOR IS NON-CONDUCTING AND A SECOND STABLE RESET STATE WHEREIN SAID FIRST HOLDING TRANSISTOR IS NON-CONDUCTING AND SAID SECOND HOLDING TRANSISTOR IS CONDUCTING, SAID CROSS-COUPLING MEANS INCLUDING A FIRST RESISTANCE MEANS CONNECTED BETWEEN SAID FIRST EMITTER-FOLLOWER TRANSISTOR AND SAID VOLTAGE SUPPLY MEANS