Gating circuit for a time division multiplex switching system

Claim 1

A TIME DIVISION MULTIPLEX SWITCHING SYSTEM INCLUDING A COMMON TRANSMISSION LINK, A PLURALITY OF COMMUNICATION TERMINALS, AND A PLURALITY OF GATING MEANS EACH INDIVIDUALLY ASSOCIATED WITH ONE OF SAID COMMUNICATION TERMINALS, SAID GATING MEANS EACH COMPRISING: A BILATERAL TRANSISTOR HAVING A FIRST ELECTRODE CONNECTED TO SAID COMMUNICATION TERMINAL, A SECOND ELECTRODE CONNECTED TO SAID COMMON TRANSMISSION LINK, AND A BASE ELECTRODE; RECTIFIER MEANS CONNECTED TO SAID COMMUNICATION TERMINAL AND TO SAID COMMON TRANSMISSION LINK; A TRANSFORMER HAVING A SECONDARY WINDING CONNECTED TO SAID RECTIFIER MEANS AND TO SAID BASE ELECTRODE, AND A PRIMARY WINDING; MEANS FOR SELECTIVELY APPLYINNG CONTROL PULSES TO SAID PRIMARY WINDING FOR SWITCHING SAID TRANSISTOR AND SAID RECTIFIER MEANS FROM A HIGH IMPEDANCE STATE TO A LOW IMPEDANCE STATE TO CONTROL THE TRANSFER OF SIGNALS FROM ONE OF SAID COMMUNICATIONS TERMINALS TO ANOTHER OVER SAID COMMON TRANSMISSION LINK; AND MEANS INTERPOSED BETWEEN SAID RECTIFIER MEANS AND SAID SECONDARY WINDING FOR REDUCING THE TIME REQUIRED FOR SAID TRANSISTOR TO SWITCH FROM ITS LOW IMPEDANCE STATE TO ITS HIGH IMPEDANCE STATE.