Ultrasonic delay line circulating memory system

Claim 1

AN ELECTRICAL CIRCUIT COMPRISING IN COMBINATION, AN ULTRASONIC DELAY LINE, MEANS FOR PROVIDING TO SAID DELAY LINE NON-RETURN-TOZERO INFORMATION SIGNALS HAVING FIRST AND SECOND SIGNAL LEVELS WITH INTERPOSED TRANSITIONS THEREBETWEEN, SAID DELAY LINE PROVIDING IN RESPONSE TO EACH OF THE TRANSITIONS IN SAID INFORMATION SIGNAL A SINEWAVE SIGNAL HAVING AN INITIAL POLARITY THAT CORRESPONDS TO THE DIRECTION OF THE TRANSITION PRODUCING SAID SINEWAVE SIGNAL, A TRIGGER CIRCUIT HAVING FIRST AND SECOND CONDUCTIVE STATES CORRESPONDING TO THE INITIAL POLARITY OF SAID SINEWAVE SIGNALS, MEANS COUPLING SAID TRIGGER CIRCUIT TO SAID DELAY LINE TO BE TRIGGERED INTO ONE OF SAID CONDUCTIVE STATES DEPENDING UPON THE POLARITY OF SAID INFORMATION SIGNALS SO AS TO PRODUCE A NON-RETURN-TO-ZERO OUTPUT SIGNAL, A TUNNEL DIODE CIRCUIT INCLUDING A PAIR OF SERIALLY CONNECTED TUNNEL DIODES, MEANS FOR PROVIDING FIRST AND SECOND TRAINS OF CLOCKING PULSES OF OPPOSITE POLARITY TO OPPOSITE ENDS OF SAID SERIALLY CONNECTED TUNNEL DIODES TO FORWARD BIAS SAID DIODES TO OPERATE AS A BALANCED PAIR CIRCUIT, AND MEANS FOR COUPLING SAID TUNNEL DIODE CIRCUIT TO SAID TRIGGER CIRCUIT TO SAMPLE THE CONDUCTIVE STATE OF SAID TRIGGER CIRCUIT TO PRODUCE BIPOLAR PULSES OF THE SAME FREQUENCY AS SAID CLOCKING PULSES AND HAVING A POLARITY THAT CORRESPONDS TO THE CONDUCTIVE STATE OF SAID TRIGGER CIRCUIT.