Digital shift circuit

Claim 1

FOR SCALING DIGITAL SIGNALS IN A DIGITAL REGISTER; AN ARRAY OF TWO-STATE ELEMENTS ARRANGED IN ROWS, COLUMNS AND DIAGONALS; THE TWO STATES BEING SIGNAL-PASSING AND SIGNAL-BLOCKING STATES, A DIGITAL-SIGNAL INPUT LINE BEING INPUT-CONNECTED TO EVERY ELEMENT IN EACH ARRAY COLUMN, A SHIFT LINE BEING INPUT-CONNECTED TO EVERY ELEMENT IN EACH ARRAY ROW, ONE OF THE SHIFT LINES BEING FOR CAUSING A DITIGAL SIGNAL SHIFT OF ZERO PLACES, A PLURALITY OF SENSE LINES RESPECTIVELY OUTPUT-CONNECTED TO EVERY ELEMENT IN EACH ARRAY DIAGONAL PARALLEL TO ONE OF THE MAJOR DIAGONALS, A DIFFERENCE DETECTOR CONNECTED TO TWO OF THE SENSE LINES WHICH ARE RESPECTIVELY OUTPUT-CONNECTED TO ELEMENTS ASSOCIATED WITH THE ZERO SHIFT LINE AND THE INPUT LINES OF THE TWO LEFT-MOST COLUMNS, OUTPUT MEANS CONNECTED TO ALL OF THE SENSE LINES, AND EFFECTIVELY INTERCONNECTING SAME SUCH THAT THE RESULTANT INTERCONNECTED LINES EACH HAVE ONE OUTPUT CONNECTION IN EACH OF THE ROWS AND COLUMNS, SHIFT CONTROL MEANS CONNECTED TO THE SHIFT LINES FOR PROVIDING A SINGLE IMPULSE ON ONE LINE TO CAUSE A SHIFT, SCALE-FACTOR CONTROL MEANS CONNECTED TO THE SHIFT CONTROL MEANS AND THE DIFFERENCE DETECTOR FOR SUCCESSIVELY CAUSING ZERO AND A GREATER THAN ZERO SIGNAL SHIFTS UNTIL THE DETECTOR SENSES TWO DIFFERENT DIGITAL SIGNALS.