US3192508A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Computing system
Assignee: Massachusetts Institute of Technology
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Filing: 1961-04-24
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Granted: 1965-06-29
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Expires: 1981-04-24
Abstract
No abstract record available.
Inventors
- 👤 Jr J Halcombe Laning
- 👤 Ramon L Alonso
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-22 19:08
CPC Classifications
G; G06; G06F; G06F9/00; G06F9/06; G06F9/46; G06F9/48; G06F9/4806; G06F9/4812; G06F9/4818
Claims Analysis
Total Claims: 2
Claim 1
Independent Claim
380 words
IN AN ELECTRONIC DIGITAL COMPUTER OF THE PARALLEL TYPE WHICH COMPRISES AN ERASABLE MAGNETIC CORE STORAGE MATRIX, HAVING ROWS OF CORES CORRESPONDING WITH THE WORDS STORED, ARRANGED IN COLUMNS CORRESPONDING TO THE BITS OF THE WORDS, CENTRAL REGISTERS CONTAINING CORES SIMILARLY ARRANGED IN ROWS AND COLUMNS WHEREIN SAID ROWS ARE THREADED BY "WRITE" AND "CLEAR" LINES WHICH ACTIVATE SELECTED ROWS OF CORES, AND WHEREIN SAID COLUMNS ARE THREADED BY "SENSE" AND "WRITE" LINES BY WHICH WORDS IN THE SELECTED ROWS ARE COPIED, TRANSFERRED, AND COMBINED, IN A PARALLEL MANNER AND ALSO COMPRISING A SEQUENCE GENERATOR ASSOCIATED WITH THE CENTRAL REGISTERS WHICH CONTAINS A CHAIN OF CORES INTO WHICH A NUMBER MAY BE SET WHICH HAS THE EFFECT OF ORDERING THE SEQUENCE GENERATOR TO PRODUCE THE ELEMENTARY "WRITE," "CLEAR" AND "SENSE" ORDERS BY WHICH ARITHMETIC OPERATIONS ON NUMBERS IN THE REGISTERS ARE ACCOMPLISHED, AND FURTHER COMPRISING A PROGRAM CONTROL UNIT WHICH DIRECTS THE PROGRAM OF THE COMPUTER BY SENDING TO THE SEQUENCE GENERATOR THE CONTROLLING ORDER NUMBERS, AND WHICH DESIGNATES ADDRESSES IN THE MEMORY TO OR FROM WHICH WORDS ARE TO GO, THE IMPROVEMENTS WHICH COMPRISE A PRIORITY CIRCUIT COMPRISING A PLURALITY OF SUBSTANTIALLY IDENTICAL LOW-PASS PI FILTER SECTIONS IN SERIES, THE SERIES ELEMENTS OF SAID SECTIONS COMPRISING PRIORITY CORES INCLUDING FIRST SQUAREHYSTERESIS-LOOP MAGNETIC CORE, A LAST SQUARE-HYSTERESISLOOP MAGNETIC CORE, A PLURALITY OF INTERMEDIATE SQUAREHYSTERESIS-LOOP MAGNETIC CORES, A FIRST WINDING ON SAID FIRST CORE, HAVING A START, AN INTERMEDIATE POINT, AND A TERMINATION, CONNECTING MEANS INCLUDING WINDINGS ON SAID INTERMEDIATE CORES JOINING SAID INTERMEDIATE POINT TO SAID BEGINNING AND RESISTIVE MEANS JOINING SAID TAP TO A FIRST POINT OF FIXED POTENTIAL, THE SHUNT ELEMENTS OF SAID SECTIONS COMPRISING A FIRST TRANSISTOR CONNECTED EMITTER TO SAID INTERMEDIATE POINT, BASE TO SAID END, AND COLLECTOR TO SAID FIRST POINT, AND A LAST TRANSISTOR CONNECTED EMITTER TO SAID TAP, BASE TO SAID TERMINATION AND COLLECTOR TO SAID FIRST POINT, SWITCHING MEANS FOR MOMENTARILY CONNECTING SAID START TO A SECOND POINT OF FIXED POTENTIAL WHEREBY NO MORE THAN ONE OF SAID CORES IS REVERSED IN MAGNETIZATION, SAID ONE BEING THE FIRST IN LINE, HAVING THAT PARTICULAR POLARIZATION WHICH ALLOWS SWITCHING BY REGENERATIVE ACTION BETWEEN CORE WINDING AND TRANSISTOR, AND WINDINGS LINKING PREDETERMINED ONES OF SAID PRIORITY CORES WITH PREDETERMINED ONES OF SAID CHAIN OF CORES.
Claim 2
Dependent Claim
380 words
IN AN ELECTRONIC DIGITAL COMPUTER OF THE PARALLEL TYPE WHICH COMPRISES AN ERASABLE MAGNETIC CORE STORAGE MATRIX, HAVING ROWS OF CORES CORRESPONDING WITH THE WORDS STORED, ARRANGED IN COLUMNS CORRESPONDING TO THE BITS OF THE WORDS, CENTRAL REGISTERS CONTAINING CORES SIMILARLY ARRANGED IN ROWS AND COLUMNS WHEREIN SAID ROWS ARE THREADED BY "WRITE" AND "CLEAR" LINES WHICH ACTIVATE SELECTED ROWS OF CORES, AND WHEREIN SAID COLUMNS ARE THREADED BY "SENSE" AND "WRITE" LINES BY WHICH WORDS IN THE SELECTED ROWS ARE COPIED, TRANSFERRED, AND COMBINED, IN A PARALLEL MANNER AND ALSO COMPRISING A SEQUENCE GENERATOR ASSOCIATED WITH THE CENTRAL REGISTERS WHICH CONTAINS A CHAIN OF CORES INTO WHICH A NUMBER MAY BE SET WHICH HAS THE EFFECT OF ORDERING THE SEQUENCE GENERATOR TO PRODUCE THE ELEMENTARY "WRITE," "CLEAR" AND "SENSE" ORDERS BY WHICH ARITHMETIC OPERATIONS ON NUMBERS IN THE REGISTERS ARE ACCOMPLISHED, AND FURTHER COMPRISING A PROGRAM CONTROL UNIT WHICH DIRECTS THE PROGRAM OF THE COMPUTER BY SENDING TO THE SEQUENCE GENERATOR THE CONTROLLING ORDER NUMBERS, AND WHICH DESIGNATES ADDRESSES IN THE MEMORY TO OR FROM WHICH WORDS ARE TO GO, THE IMPROVEMENTS WHICH COMPRISE A PRIORITY CIRCUIT COMPRISING A PLURALITY OF SUBSTANTIALLY IDENTICAL LOW-PASS PI FILTER SECTIONS IN SERIES, THE SERIES ELEMENTS OF SAID SECTIONS COMPRISING PRIORITY CORES INCLUDING FIRST SQUAREHYSTERESIS-LOOP MAGNETIC CORE, A LAST SQUARE-HYSTERESISLOOP MAGNETIC CORE, A PLURALITY OF INTERMEDIATE SQUAREHYSTERESIS-LOOP MAGNETIC CORES, A FIRST WINDING ON SAID FIRST CORE, HAVING A START, AN INTERMEDIATE POINT, AND A TERMINATION, CONNECTING MEANS INCLUDING WINDINGS ON SAID INTERMEDIATE CORES JOINING SAID INTERMEDIATE POINT TO SAID BEGINNING AND RESISTIVE MEANS JOINING SAID TAP TO A FIRST POINT OF FIXED POTENTIAL, THE SHUNT ELEMENTS OF SAID SECTIONS COMPRISING A FIRST TRANSISTOR CONNECTED EMITTER TO SAID INTERMEDIATE POINT, BASE TO SAID END, AND COLLECTOR TO SAID FIRST POINT, AND A LAST TRANSISTOR CONNECTED EMITTER TO SAID TAP, BASE TO SAID TERMINATION AND COLLECTOR TO SAID FIRST POINT, SWITCHING MEANS FOR MOMENTARILY CONNECTING SAID START TO A SECOND POINT OF FIXED POTENTIAL WHEREBY NO MORE THAN ONE OF SAID CORES IS REVERSED IN MAGNETIZATION, SAID ONE BEING THE FIRST IN LINE, HAVING THAT PARTICULAR POLARIZATION WHICH ALLOWS SWITCHING BY REGENERATIVE ACTION BETWEEN CORE WINDING AND TRANSISTOR, AND WINDINGS LINKING PREDETERMINED ONES OF SAID PRIORITY CORES WITH PREDETERMINED ONES OF SAID CHAIN OF CORES.
References Cited (Backward Citations)
No citation records indexed.
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1968-06-28 | 1968-12-28 | 1969-06-29 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1972-06-28 | 1972-12-28 | 1973-06-29 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1976-06-28 | 1976-12-28 | 1977-06-29 | $7700.00 | Window Closed / Lapsed |