Adaptive data compactor

Claim 1

AN ADAPTIVE CIRCUIT FOR REDUCING THE AMOUNT OF BINARY BITS REQUIRED AT A CIRCUIT OUTPUT LINE TO REPRESENT A SEQUENCE OF BINARY DATA FROM AN INPUT SOURCE COMPRISING IN COMBINATION: A COMPARISON CIRCUIT HAVING TWO INPUTS AND AN OUTPUT; A DELAY CIRCUIT FOR DELAYING EACH BINARY BIT SEQUENCE APPLIED TO IT A PREDETERMINED AMOUNT; MEANS FOR APPLYING EACH BIT OF THE BINARY DATA SIMULTANEOUSLY TO ONE INPUT OF SAID COMPARISON CIRCUIT AND TO SAID DELAY CIRCUIT; MEANS FOR APPLYING THE OUTPUT OF SAID DELAY CIRCUIT TO THE OTHER INPUT OF SAID COMPARISON CIRCUIT; VARIABLE ENCORDOR MEANS, HAVING AN INPUT CONNECTED TO THE OUTPUT OF SAID COMPARISON CIRCUIT AND AN OUTPUT CONNECTED TO THE CIRCUIT OUTPUT LINE, FOR ENCODING THE OUTPUT FROM SAID COMPARISON CIRCUIT; MEANS RESPONSIVE TO THE INPUT SOURCE FOR ANALYZING THE STATISTICS OF THE INPUT DATA AND FOR GENERATING AN OUTPUT IN RESPONSE TO PREDETERMINED VARIATIONS THEREIN; AND MEANS RESPONSIVE TO THE OUTPUT OF SAID ANALYZING MEANS FOR SELECTING FROM THE POSSIBLE CODING ACTIONS OF SAID VARIABLE ENCODER, THE CODING ACTION WHICH WILL YIELD THE LEAST NUMBER OF BITS AT THE CIRCUIT OUTPUT LINE.