Transistorized step multiplier

Claim 1

A MULTIPLIER CIRCUIT FOR MULTIPLYING AN ANALOG QUANTITY BY A DIGITAL QUANTITY COMPRISING A FIRST VARIABLE GAIN AMPLIFIER INCLUDING FIRST AND SECOND COMPLEMENTARY TRANSISTORS EACH HAVING BASE, EMITTER AND COLLECTOR ELECTRODES, THE COLLECTOR ELECTRODE OF SAID FIRST TRANSISTOR BEING CONNECTED TO THE BASE ELECTRODE OF SAID SECOND TRANSISTOR AT A FIRST JUNCTURE AND THE EMITTER ELECTRODE OF SAID FIRST TRANSISTOR BEING CONNECTED TO THE COLLECTOR ELECTRODE OF SAID SECOND TRANSISTOR AT A SECOND JUNCTURE TO PROVIDE A HIGH CURRENT AMPLIFICATION DEVICE, MEANS FOR APPLYING SAID ANALOG QUANTITY IN THE FORM OF A VOLTAGE BETWEEN THE BASE ELECTRODE OF SAID FIRST TRANSISTOR AND A REFERENCE POITN, AN IMPEDANCE MATRIX CONNECTED BETWEEN SAID SECOND JUNCTURE AND SAID REFERENCE POINT, SAID IMPEDANCE MATRIX INCLUDING THE PARALLEL COMBINATION OF A PLURALITY OF RESISTORS SERIALLY CONNECTED TO ELECTRONIC SWITCHES, MEANS FOR ELECTRICALLY VARYING THE IMPEDANCE OF SAID MATRIX BY SELECTIVELY ENERGIZING SAID SWITCHES IN ACCORDANCE WITH SAID DIGITAL QUANTITY TO PROVIDE AN OUTPUT SIGNAL AT THE EMITTER ELECTRODE OF SAID SECOND TRANSISTOR WHICH IS A FUNCTION OF THE PRODUCT OF SAID TWO QUANTITIES, A PLURALITY OF COMPENSATION RESISTORS HAVING ONE COMMON TERMINAL, THE OTHER TERMINALS THEREOF BEING CONNECTED RESPECTIVELY TO THE JUNCTIONS OF THE MATRIX RESISTORS AND THE SERIALLY CONNECTED SWITCHES, A SECOND VARIABLE GAIN AMPLIFIER INCLUDING THIRD AND FOURTH COMPLEMENTARY TRANSISTORS EACH HAVING BASE, EMITTER AND COLLECTOR ELECTRODES, THE COLLECTOR ELECTRODE OF SAID THIRD TRANSISTOR BEING CONNECTED TO THE BASE ELECTRODE OF SAID FOURTH TRANSISTOR AND THE EMITTER ELECTRODE OF SAID THIRD TRANSISTOR BEING CONNECTED TO THE COLLECTOR ELECTRODE OF SAID FOURTH TRANSISTOR AND TO THE COMMON TERMINAL OF SAID COMPENSATION RESISTORS, THE BASE ELECTORDE OF SAID THIRD TRANSISTOR BEING RESPONSIVE TO SAID ANALOG QUANTITY WHEREBY UNDESIRABLE CURRENTS CONDUCTED BY SAID SWITCHES ARE SHUNTED THROUGH SAID COMPENSATION RESISTORS AND SAID SECOND VARIABLE GAIN AMPLIFIER TO IMPROVE THE ACCURACY OF SAID OUTPUT SIGNAL.