US3167748A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Cryotron memory
Assignee: General Electric Co
•
Filing: 1962-07-05
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Granted: 1965-01-26
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Expires: 1982-07-05
Abstract
No abstract record available.
Inventors
- 👤 John W Bremer
- 👤 Oliver J Cotey
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-22 23:16
CPC Classifications
G; G11; G11C; G11C11/00; G11C11/21; G11C11/44; Y; Y10; Y10S; Y10S505/00; Y10S505/825; Y10S505/831; Y10S505/833; Y10S505/834; Y10S505/836
Claims Analysis
Total Claims: 1
Claim 1
Independent Claim
144 words
A STORAGE CIRCUIT COMPRISING: FIRST AND SECOND SUPERCONDUCTIVE LOOP CIRCUITS CONNECTED IN SERIES, EACH LOOP CIRCUIT PROVIDING PARALLEL CURRENT PATHS; MEANS FOR APPLYING A DIGIT CURRENT TO SAID SERIES CONNECTED LOOP CIRCUITS; A FIRST CURRENT CONTROLLED RESISTANCE MEANS CONNECTED IN ONE OF THE CURRENT PATHS OF SAID FIRST LOOP; MEANS FOR APPLYING A WRITE CURRENT OF SAID FIRST RESISTANCE MEANS FOR RENDERING SAID ONE CURRENT PATH OF SAID FIRST LOOP RESESTIVE WHEREBY SUBSTANTIALLY ALL OF SAID DIGIT CURRENT IS DIVERTED TO THE OTHER CURRENT PATH OF SAID FIRST LOOP; MEANS FOR REMOVING SAID DIGIT AND WRITE CURRENTS WHEREBY A STORAGE CURRENT IS ESTABLINSED IN SAID LOOP; A SECOND CURRENT CONTROLLED RESISTANCE MEANS IN A FIRST PATH OF SAID SECOND LOOP, SAID SECOND RESISTANCE MEANS BEING RESPONSIVE TO A STORAGE CURRENT IN SAID FIRST LOOP TO RENDER SAID FIRST PATH OF SAID SECOND LOOP RESISTIVE.
References Cited (Backward Citations)
US3043512A
Cited
US3086197A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1968-01-26 | 1968-07-27 | 1969-01-26 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1972-01-26 | 1972-07-27 | 1973-01-26 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1976-01-26 | 1976-07-27 | 1977-01-26 | $7700.00 | Window Closed / Lapsed |