Digital target information transmission system with parallax correction

Claim 1

A SERIAL ADDER FOR SUMMING TWO SETS OF CODED SIGNALS IN BINARY DIGITAL FORM COMPRISING A FIRST CIRCUIT RESPONSIVE WHEN THE CODED SIGNALS FROM THE FIRST OF SAID UNITS IN SAID CHAIN AND FROM SAID ENTERING MEANS ARE SIMILAR AND IN ACCORDANCE WITH THE FIRST OF THE TWO CONDITIONS, A SECOND CIRCUIT RESPONSIVE WHEN THE CODED SIGNALS FROM THE FIRST OF SAID UNITS IN SAID CHAIN AND FROM SAID ENTERING MEANS ARE NOT SIMILAR, A FIRST FLIP-FLOP CONNECTED TO AND CONTROLLED BY SAID FIRST CIRCUIT, A SECOND FLIP-FLOP CONNECTED TO SAID FIRST FLIP-FLOP, A FIRST PULSING MEANS FOR SETTING SAID SECOND FLIP-FLOP IN ACCORDANCE WITH THE SETTING OF SAID FIRST FLIP-FLOP, A THIRD FLIP-FLOP CONNECTED TO AND CONTROLLED BY SAID SECOND CIRCUIT, A SECOND FIRST CIRCUIT AND A SECOND SECOND CIRCUIT CONNECTED TO SAID SECOND AND TO SAID THIRD FLIP-FLOP, AND A SECOND PULSING MEANS OPERABLE BEFORE SAID FIRST PULSING MEANS CONNECTED TO SAID SECOND AND TO SAID THIRD FLIP-FLOP, SAID SECOND FIRST CIRCUIT BEING CONNECTED TO AND CONTROLLING SAID FIRST FLIPFLOP TO INDICATE A CARRY, SAID SECOND SECOND CIRCUIT PROVIDING THE CODED SUM SIGNAL FROM SAID SERIAL ADDER.