US3127565A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Precision peak voltage memory circuit
Assignee: Individual
•
Filing: 1961-02-21
•
Granted: 1964-03-31
•
Expires: 1981-02-21
Abstract
No abstract record available.
Inventors
- 👤 Meredith F Williams
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-23 15:37
CPC Classifications
G; G06; G06G; G06G7/00; G06G7/12; G06G7/25
Claims Analysis
Total Claims: 2
Claim 1
Independent Claim
185 words
A PRECISION PEAK VOLTAGE MEMORY CIRCUIT COMPRISING A MEMORY CAPACITOR IN SERIES WITH A DIODE, THE DIODE BEING RESPONSIVE TO AN INPUT SIGNAL SO AS TO UNIDIRECTIONALLY CHARGE THE CAPACITOR, AN AMPLIFIER CONNECTED ACROSS SAID CAPACITOR AND IN SERIES WITH THE DIODE SO THAT THE CAPACITOR AND THE RESISTANCE OF THE DIODE CAUSE THE AMPLIFIER TO ACT AS AN INTEGRATOR, A FEEDBACK LOOP HAVING A NON-GAIN AMPLIFIER CONNECTED BETWEEN THE CAPACITOR AND A SUMMING POINT, ANOTHER AMPLIFIER CONNECTED BETWEEN THE SUMMING POINT AND THE DIODE AND HAVING A RETURN LOOP CONNECTED FROM ITS OUTPUT TO SAID SUMMING POINT, AN INPUT LEAD RESPONSIVE TO THE INPUT SIGNAL CONNECTED TO SAID SUMMING POINT, THE INPUT LEAD AND THE FEEDBACK AND RETURN LOOPS EACH HAVING A RESISTOR INTERPOSED THEREALONG SO AS TO INTRODUCE A RESISTANCE ALONG THE CONDUCTIVE PATH OF THE LEAD AND EACH OF THE LOOPS, THE RESISTANCES OF THE RESISTOR IN THE INPUT LEAD AND THE FEEDBACK LOOP BEING EQUAL WHEREBY THE CHARGE ON THE CAPACITOR IS FORCED TO FOLLOW THE INPUT SIGNAL SO AS TO SUBSTANTIALLY ELIMINATE ANY ERRORS DUE TO NONLINEARITIES WITHIN THE CIRCUIT.
Claim 2
Dependent Claim
185 words
A PRECISION PEAK VOLTAGE MEMORY CIRCUIT COMPRISING A MEMORY CAPACITOR IN SERIES WITH A DIODE, THE DIODE BEING RESPONSIVE TO AN INPUT SIGNAL SO AS TO UNIDIRECTIONALLY CHARGE THE CAPACITOR, AN AMPLIFIER CONNECTED ACROSS SAID CAPACITOR AND IN SERIES WITH THE DIODE SO THAT THE CAPACITOR AND THE RESISTANCE OF THE DIODE CAUSE THE AMPLIFIER TO ACT AS AN INTEGRATOR, A FEEDBACK LOOP HAVING A NON-GAIN AMPLIFIER CONNECTED BETWEEN THE CAPACITOR AND A SUMMING POINT, ANOTHER AMPLIFIER CONNECTED BETWEEN THE SUMMING POINT AND THE DIODE AND HAVING A RETURN LOOP CONNECTED FROM ITS OUTPUT TO SAID SUMMING POINT, AN INPUT LEAD RESPONSIVE TO THE INPUT SIGNAL CONNECTED TO SAID SUMMING POINT, THE INPUT LEAD AND THE FEEDBACK AND RETURN LOOPS EACH HAVING A RESISTOR INTERPOSED THEREALONG SO AS TO INTRODUCE A RESISTANCE ALONG THE CONDUCTIVE PATH OF THE LEAD AND EACH OF THE LOOPS, THE RESISTANCES OF THE RESISTOR IN THE INPUT LEAD AND THE FEEDBACK LOOP BEING EQUAL WHEREBY THE CHARGE ON THE CAPACITOR IS FORCED TO FOLLOW THE INPUT SIGNAL SO AS TO SUBSTANTIALLY ELIMINATE ANY ERRORS DUE TO NONLINEARITIES WITHIN THE CIRCUIT.
References Cited (Backward Citations)
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1967-03-31 | 1967-09-30 | 1968-03-31 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1971-03-31 | 1971-09-30 | 1972-03-31 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1975-03-31 | 1975-09-30 | 1976-03-31 | $7700.00 | Window Closed / Lapsed |