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JPS5945563A Expired / Lapsed JP ⏱️ 0.0 years remaining

Automatic bus switching device for testing bus connecting equipment

Assignee: Toshiba Corp
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Filing: 1982-09-08
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Granted: —
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Expires: 2002-09-08
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Abstract

Abstract PURPOSE:To automatically and continuously perform test of plural equipments to be tested, by installing a tri-state gate between a CPU and the plural equipments to be tested, and performing ON/OFF control on the gate. CONSTITUTION:A command which opens the gate of the tri-state gate (G) 31i of a port (i) (i=0-n) is transferred from a CPU10 to the interface 33 of an equipment address through an input-output bus 20. The interface 33 decodes the command and sets an FF32i corresponding to the G31i. When this setting is made, the corresponding gate G31i is opened and equipment 40i to be tested is selectively connected to the port (i) of the bus 20. Then the CPU10 starts the testing on the equipment 40i to be tested which is connected to the port (i). The CPU10 repeates the operation for n-times. In this case, more than two sets of equipment of the n-sets of equipment are never connected simultaneously to the input-output bus 20.

Inventors

  • 👤 Hiroshi Maeda
  • 👤 博 前田
  • 👤 Mitsuo Kasahara
  • 👤 笠原 三男

Bibliographic Details

Application Number —
Jurisdiction JP
Data Source google_patents
Last Synchronized 2026-10-23 15:36
CPC Classifications
G; G06; G06F; G06F11/00; G06F11/22; G06F11/2205; G06F11/221

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