GB2049243A
Expired / Lapsed
GB
⏱️ 0.0 years remaining
Industrial control system
Assignee: FORNEY ENG INT
•
Filing: 1980-04-28
•
Granted: —
•
Expires: 2000-04-28
Abstract
No abstract record available.
Inventors
No inventors recorded.
Bibliographic Details
Application Number
—
Jurisdiction
GB
Data Source
google_patents
Last Synchronized
2026-10-23 00:46
CPC Classifications
G; G06; G06K; G06K13/00; G06K13/02; G06K13/08; G06K13/0806; G06K13/0825; G05; G05B; G05B19/00; G05B19/02; G05B19/04; G05B19/05; G05B19/052; G05B19/418; G05B19/4181; G06F; G06F13/00; G06F13/38; G06F13/382; G06F13/385; G05B2219/00; G05B2219/10; G05B2219/12; G05B2219/1206; G05B2219/15; G05B2219/15005; G05B2219/15068; Y; Y02; Y02P; Y02P90/00; Y02P90/02
Claims Analysis
Total Claims: 16
Claim 1
Independent Claim
383 words
A distributed computer control system for controlling a plurality of controllable devices each having a respective set of logic functions and/or command sequences, said system comprising a plurality of computers each for connection, respectively, to individual ones of the plurality of controllable devices for providing control thereto, each of said computers having a central processor adapted to address a plurality of locations including memory locations and input/output port locations and adapted to operate in an indirect addressing mode, and each of said computers being arranged for connection to its respective controllable device through input/output ports of the said device and for providing signals therethrough to effect the particular set of logic functions and/or command sequences relevant to the device to effect control thereof and a central supervisory computer adapted to selectively monitor the function of each of said device computers, said device computers being connected to the central, supervisory computer and to one another through a data highway, wherein each device computer has a first set of predetermined memory locations containing instructions for effecting the logic control functions and/or command sequences of all the controllable devices that exist within the system, and some of said instructions cause said respective central processor to address a second, predetermined set of memory locations in order to obtain input signal information and provide output signal information to effect all of said logic control functions and/or command sequences, selected ones of said second set of memory locations that correspond to the logic control functions and/or command sequences of the respective controllable devices contain the input/output port addresses of said respective controllable device so that the logic control functions and/or command sequence portions of the instructions in said first set of memory locations that relate to the respective controllable device are operative through said selected ones of said second set of memory locations to receive signal information from and provide control signal information to said respective controllable device, and the remaining ones of said second set of memory locations contain addresses which are chosen so that the logic control functions and/or command sequence portions of said instructions in said first set of locations that do not correspond to the logic control function and/or command sequences of the respective controllable device effect no control effect on the respective controllable device.
Claim 2
Dependent Claim
383 words
A distributed computer control system for controlling a plurality of controllable devices each having a respective set of logic functions and/or command sequences, said system comprising a plurality of computers each for connection, respectively, to individual ones of the plurality of controllable devices for providing control thereto, each of said computers having a central processor adapted to address a plurality of locations including memory locations and input/output port locations and adapted to operate in an indirect addressing mode, and each of said computers being arranged for connection to its respective controllable device through input/output ports of the said device and for providing signals therethrough to effect the particular set of logic functions and/or command sequences relevant to the device to effect control thereof and a central supervisory computer adapted to selectively monitor the function of each of said device computers, said device computers being connected to the central, supervisory computer and to one another through a data highway, wherein each device computer has a first set of predetermined memory locations containing instructions for effecting the logic control functions and/or command sequences of all the controllable devices that exist within the system, and some of said instructions cause said respective central processor to address a second, predetermined set of memory locations in order to obtain input signal information and provide output signal information to effect all of said logic control functions and/or command sequences, selected ones of said second set of memory locations that correspond to the logic control functions and/or command sequences of the respective controllable devices contain the input/output port addresses of said respective controllable device so that the logic control functions and/or command sequence portions of the instructions in said first set of memory locations that relate to the respective controllable device are operative through said selected ones of said second set of memory locations to receive signal information from and provide control signal information to said respective controllable device, and the remaining ones of said second set of memory locations contain addresses which are chosen so that the logic control functions and/or command sequence portions of said instructions in said first set of locations that do not correspond to the logic control function and/or command sequences of the respective controllable device effect no control effect on the respective controllable device.
Claim 3
Dependent Claim
197 words
A computer system according to Claim 1 wherein said device computers are divided into a predetermined number of groups of P computers, all of which are selectively addressed by said central, supervisory computer through a plurality of address buses of said data highway, a first and a second of said address bus provide, respectively, a one-of-M and a one-of-N decoded output to M terminations and N terminations on a jumper pad associated with each said group, 35 first and second jumper links connect, respectively, from a selected one of said M terminations and a selected one of said N terminations to the inputs of a coincidence gate, said gate providing an output when coincidence occurs between the selected M output and the selected N output, an undecoded binary address bus connected to a one-or-P decoder, the P outputs of said decoder being connected, one-by-one, to said P device computers within said predetermined group, and said gate connects to said one-of-P decoder to provide an enabling signal thereto to enable said one-of-P decoder to select a particular one of said predetermined group of P control computers when coincidence occurs between said selected M and said selected N outputs.
Claim 4
Dependent Claim
48 words
A computer system according to Claim 1 or Claim 2, wherein said first set of predetermined memory locations for each computer are contained within a first read only memory, and said second set of predetermined memory locations for each computer are contained within a second read only memory.
Claim 5
Dependent Claim
24 words
A computer system according to Claim 3, wherein said second read only memory is a field-programmable read only memory mounted in a plug-type socket.
Claim 6
Dependent Claim
24 words
A computer system according to any preceding claim, wherein said central processor function in an indirect addressing mode when addressing said second memory locations.
Claim 7
Dependent Claim
34 words
A computer system according to any preceding claim, wherein said logic control function and/or command sequences include providing momentary start and stop output command signals in response, respectively, to input start and stop signals.
Claim 8
Dependent Claim
35 words
A computer system according to any preceding claim, wherein said logic control functions and/or command sequences include providing latched start and stop output command signals in response to, respectively, momentary start and stop input signals.
Claim 9
Dependent Claim
38 words
A computer system according to any preceding claim wherein said logic functions and/or command sequences include providing an alarm output signal in response to a failure to 60 respond, loss of power, or loss of continuity input signal.
Claim 10
Dependent Claim
33 words
A computer system according to any preceding claim, wherein said logic control functions and/or command sequences include providing an output signal to an indicator to indicate that a device has resDonded as commanded.
Claim 11
Dependent Claim
41 words
A computer system according to any preceding claim, wherein the logic control 65 A z 17 41 GB2049243A 41 functions and/or command sequences include providing a signal to an indicator to indicate that a controllable device has not responded as commanded.
Claim 12
Dependent Claim
22 words
A distributed computer control system according to any preceding claim when connected to said plurality of controllable devices to provide control thereof.
Claim 13
Independent Claim
344 words
A method of setting up a specific control system of the type having a plurality of computers each connected through input/output ports to a plurality of respective controllable devices in which the control computers are connected to each other and to a central, supervisory computer through a data highway and in which each device computer includes a memory and a central processor that is adapted to address both memory locations and input/output port locations and also adapted to operate in an indirect addressing mode and in which each 10 controllable device has a particular set of logic control functions and/or command sequences associated therewith to effect control thereof, wherein in a first set of predetermined memory locations of each of said computers, there is provided a set of instructions adapted to effect control of the logic control functions and/or command sequences of all the controllable devices that exist in the system, some of said instructions causing said processor to address a second, 15 predetermined set of memory locations for receiving input signal information and providing output signal information to effect all of said logic control functions and/or sequences; in selected ones of said second set of said memory locations of a respective control computer that correspond to the logic control functions and/or command sequences of a respective controlla- ble device, there is provided the input/output port address information of the respective controllable device such that the logic control functions and/or command sequence portions of said instructions that correspond to the logic control function and/or command sequences of said respective controllable device are operative through said input/output port addresses in said selected ones of said second memory locations to provide control to said respective controllable device, and in the remaining ones of said second: set of memory locations, address information is pr6ioed which is chosen such that the instructions in said first memory location of said respective control computer that do not correspond to the logic control functions and/or command sequences of the respective controllable device have no control effect on the respective controllable device.
Claim 14
Independent Claim
344 words
A method of setting up a specific control system of the type having a plurality of computers each connected through input/output ports to a plurality of respective controllable devices in which the control computers are connected to each other and to a central, supervisory computer through a data highway and in which each device computer includes a memory and a central processor that is adapted to address both memory locations and input/output port locations and also adapted to operate in an indirect addressing mode and in which each 10 controllable device has a particular set of logic control functions and/or command sequences associated therewith to effect control thereof, wherein in a first set of predetermined memory locations of each of said computers, there is provided a set of instructions adapted to effect control of the logic control functions and/or command sequences of all the controllable devices that exist in the system, some of said instructions causing said processor to address a second, 15 predetermined set of memory locations for receiving input signal information and providing output signal information to effect all of said logic control functions and/or sequences; in selected ones of said second set of said memory locations of a respective control computer that correspond to the logic control functions and/or command sequences of a respective controlla- ble device, there is provided the input/output port address information of the respective controllable device such that the logic control functions and/or command sequence portions of said instructions that correspond to the logic control function and/or command sequences of said respective controllable device are operative through said input/output port addresses in said selected ones of said second memory locations to provide control to said respective controllable device, and in the remaining ones of said second: set of memory locations, address information is pr6ioed which is chosen such that the instructions in said first memory location of said respective control computer that do not correspond to the logic control functions and/or command sequences of the respective controllable device have no control effect on the respective controllable device.
Claim 15
Dependent Claim
54 words
A distributed computer control system for controlling a plurality of controllable devices 30 substantially as described herein with reference to the accompanying drawings. Printed for Her Majesty's Stationery Office by Burgess Et Son (Abingdon) Ltd.-1 980. Published at The Patent Office, 25 Southampton Buildings, London, WC2A I AY, from which copies may be obtained.
Claim 16
Dependent Claim
54 words
A distributed computer control system for controlling a plurality of controllable devices 30 substantially as described herein with reference to the accompanying drawings. Printed for Her Majesty's Stationery Office by Burgess Et Son (Abingdon) Ltd.-1 980. Published at The Patent Office, 25 Southampton Buildings, London, WC2A I AY, from which copies may be obtained.
References Cited (Backward Citations)
No citation records indexed.
USPTO Annuity & Maintenance Windows
Maintenance schedule is calculated for granted US utility patents.