Body implantable pacemaker

Claim 2

Body-implantable electrical stimulating and sensing apparatus comprising control means including a control processor and memory means, the control processor having address means for addressing a program stored within a selected storage portion of the memory means and the memory means having at least first and second storage portions for storing different first and second programs respectively, first and second select switch means arranged to be controlled by the processor and connected respectively to first and second lead means, which lead means are arranged to provide stimulating signals to body tissue and/or supply sensed signals to the control means, and means for selectively changing the address of said address means, whereby said address means applies a starting address to one of said first and second storage portions to effect the execution of said first or second program.

Claim 3

Apparatus as claimed in claim 1 wherein the control processor comprises a microprocessor.

Claim 4

Apparatus as claimed in claim 2, wherein there is included resetting means coupled to said microprocessor for periodically generating a reset signal to reset said address means to a predetermined return address, whereby if said address means inadvertently addresses a meaningless location in said memory means, the execution by said microprocessor of a selected program within said memory will be continued by addressing the predetermined return address within the selected program.

Claim 5

Apparatus as claimed in claim 3, wherein said microprocessor includes means coupled to said reset means for periodically generating and applying a defeat command signal to said reset means to defeat the operation of said reset means if said address means is operating correctly.

Claim 6

Apparatus as claimed in claim 1, wherein there is further included multiplexer means having at least first and second inputs for each receiving a respective input signal, said multiplexer means coupled to said control means for receiving control signals from said control means for selectively applying the input signal of a selected input to said control means.

Claim 7

Apparatus as claimed in claim 5, wherein at least some of the input signals to said multiplexer means are analog in character, and there is included analog to digital converting means coupled to an output of said multiplexer means for receiving and converting the selected analog input signals to a corresponding digital signal, to be applied to said control means.

Claim 8

Apparatus as claimed in claim 6, wherein there is included scaling means for selectively varying the amplification applied to the selected input signal, whereby the signals applied to said control means are of substantially the same amplitude.

Claim 9

Apparatus as claimed in claim 5, wherein there is included a first lead interconnecting said first input of said multiplexer means and the ventricular portion of the patient's heart, and a second lead interconnecting said second input of said multiplexer means and the atrium of the patient's heart.

Claim 10

Apparatus as claimed in claim 8, wherein there is included energizing means for providing and applying an energization signal to the elements of said implanted electrical apparatus, and a third input of said multiplexer means coupled to said energizing means for receiving the energizing signal.

Claim 11

Apparatus as claimed in claim 1, wherein there is included means external of the patient's body for transmitting encoded signals for changing the program stored in said memory means.

Claim 12

Apparatus as claimed in claim 5, wherein said multiplexer means includes a third input for receiving an address signal indicative of a starting location of a selected one of said first and second storage portions and its program, to be applied to said address means, whereby said address means addresses the starting location of the program as stored within the selected one of said first and second portions of said memory means.

Claim 13

Apparatus as claimed in claim 11, wherein there is included receiver means coupled to said address input of said multiplexer means, and transmitter means external of the patient's body for transmitting encoded signals to said receiver means, whereby the address signal indicative of the starting location of the selected portion within said memory means is applied to said address input.

Claim 14

Apparatus of claim 5, wherein there is included a magnetically actuatable switch coupled to a third input of said multiplexer means, whereby said magnetically actuatable switch may be actuated for changing the address of said address means, to address a program in a different portion of said memory means.

Claim 15

Apparatus as claimed in claim 1, wherein there is included first and second output select switches coupled respectively to first and second lead means, one of said first and second select switches being closed under the control of said control means to selectively close one of the select switches.

Claim 16

Apparatus as claimed in claim 1, wherein there is included first and second output select switch means coupled respectively to first and second lead means, and decode means coupled to receive the output of said memory means and responsive thereto to close a selected one of said output select switch means.

Claim 17

Apparatus as claimed in claim 15, wherein there is included first and second latch means coupled respectively to said first and second switch means and responsive to the output of said decode means for latching closed the selected one switch means.

Claim 18

Apparatus as claimed in claim 5, wherein there is further included power suply means for providing an energizing signal to the elements of said apparatus, first and second select switch means responsive to control signals from said control means to be selectively closed, an output circuit coupled via a first lead to a portion of the patient's heart for selectively applying stimulating pulses thereto, said first select switch means responsive to a first control signal from said control means for applying the energizing signal to said output circuit and to a second control signal from said control means for applying a stimulating pulse via said first lead to a body tissue of the patient.

Claim 19

Apparatus as claimed in claim 17, wherein said first lead is further coupled to an input of a tissue sensing amplifier, said input of said sensing amplifier being coupled by a third select switch means and responsive to a third control signal from said control means for selectively applying the input of said sensing amplifier means to ground, said sensing amplifier including an output coupled to a fourth select switch means responsive to a fourth signal from said control means for applying the output of said tissue sensing amplifier to said multiplexer means.

Claim 20

Apparatus as claimed in claim 18, wherein there is included decoding means coupled to the output of said memory means to receive output therefrom upn the execution by said control means of a program within a portion of said memory means, said decoder means responsive to said memory output for providing a first timing signal to be applied to said first select switch means, a second timing signal to be applied to said second select switch means, a third timing signal to be applied to said third select switch means and a fourth timing signal to be applied to said fourth select switch means.

Claim 21

Apparatus as claimed in claim 1 further including decode means responsive to signals derived from said memory means generated by the execution by said microprocessor of a selected program within said memory means, said decoder means generating a first control signal to close said first select switch means to apply for a first timing period a stimulating pulse by its associated lead means to stimulate a first portion of the patient's heart, and a second control signal to close said second select switch means for a second different timing period to apply the sensed heart activity signal appearing on said lead means to be processed by said microprocessor.

Claim 22

Apparatus as claimed in claim 20, wherein there is further included third and fourth select switch means each coupled by second lead means to a second portion of the patient's heart, said decoder means responsive to the signals of said memory means for generating a third control timing signal to be applied to said third switch means for applying a stimulating pulse via said second lead means to said second portion of the patient's heart, and for generating a fourth timing control means to be applied to said fourth select switch means to apply a second sensed heart activity signal via said second lead means and said closed fourth select switch means to be processed by said microprocessor.

Claim 23

Apparatus as claimed in claim 21, wherein said first mentioned lead means is coupled to a sensing amplifier and there is further included fifth select switch means coupled to said input of said sensing amplifier, said decode means responsive to the signals of said memory means for generating a fifth control timing signal, and fifth select switch means responsive to said fifth control timing signals for defeating the operation of said sensing amplifier.

Claim 24

Apparatus as claimed in claim 22, wherein there is included means for selectively changing the address of said address means, whereby said address means addresses a starting location within a different one of said first and second storage portions, whereby a different mode of stimulating the patient's heart is effected.

Claim 25

Apparatus as claimed in claim 20, wherein there is included multiplexing means having a plurality of inputs including at least a first input coupled to said second switch means and a second input coupled to said second select switch means, said multiplexing means responsive to the control signals of said microprocessor for selecting one of said plurality of inputs for processing by said microprocessor.

Claim 26

Apparatus as claimed in claim 20, wherein there is included a power source, a third select switch means, and an output circuit coupled to said first lead means for providing a stimulating pulse via said first lead means to said first portion of the patient's heart, said decode means responsive to signals of said memory means for generating a third control timing signal for a third timing period occurring prior to said first timing period, said third select means responsive to said third control timing signal of said decode means for coupling the energizing signal to energize said output circuit.

Claim 27

Apparatus as claimed in claim 25, wherein there is further included a driver amplifier for applying said first control timing signal to said output circuit, whereby said output circuit energized during said third timing period applies during said first timing period a stimulating pulse via said first lead means to the patient's heart.

Claim 28

Apparatus as claimed in claim 1, wherein said memory means comprises a third memory portion, for receiving a program of selectively sensing data appearing on one of said lead means and said control means further include means implemented by executing said third program to selectively close said select switch means associated with said one lead means whereby data is applied to said control means.

Claim 29

Apparatus as claimed in claim 1, wherein said control means comprises third means for establishing a first period corresponding to the pulse width of the stimulating signal to be applied to the patient's tissue, and third means for establishing the interval between the series of stimulating pulses.

Claim 30

Apparatus as claimed in claim 28, wherein there is included means for reprogramming said memory means, whereby the values of said pulse width and interval as set by said first and second means may be changed.

Claim 31

Apparatus as claimed in claim 1, wherein there is included means for reprogramming said program stored in either of said first and second storage portions, whereby that mode of pacing the patient's tissue is changed.

Claim 32

Apparatus as claimed in claim 1, wherein said first means includes means for establishing said first mode of pacing the patient's tissue includes means for establishing a first refractory period, a second sensing period and a third pulsing period.

Claim 33

Apparatus as claimed in claim 31, wherein there is included means for changing said first program to alter the lengths of the first, second and third periods of said first means.

Claim 34

Apparatus as claimed in claim 32, wherein said second storage portion stores a program for pacing the patient's tissue in the second mode of operation different than the first and including means for establishing a first period for sensing from a first tissue and a first signal period for sensing a second signal from a second, different tissue of the patient.

Claim 35

Apparatus as claimed in claim 31, wherein said second means comprises means for establishing a first period corresponding to the pulse width of the stimulating pulse to a first tissue portion, a second rest period, and a subsequent third period corresponding to the pulse width of a stimulating pulse to a second tissue portion of the patient, said address changing means capable of effecting a change of the starting address location as applied by said address means to said memory means, whereby a starting location in one of said first and second portions may be accessed to effect an execution of the corresponding program.

Claim 36

Apparatus as claimed in any preceding claim including an analog to digital converter comprising (a) oscillator means having an input for providing a first output signal whose frequency is dependent upon the signal applied to its input; (b) reference means for generating a reference signal; (c) switch means coupled to said input of said oscillator means and disposable from a first position wherein said switch means applies the input, analog signals to said input of said oscillator means, to a second position wherein said switch means applies the reference signal to said input of said oscillator means;; (d) first counter means coupled to receive the first outoput signal and operable in a first mode to count up and in a second mode to count down in accordance with the frequency of the first output signal to provide a second output signal; (e) second counter means coupled to receive selectively the second output signal, for providing a corresponding third digital output signal; (f) clock means for providing a clock signal; and (g) control means coupled to receive the clock signal for providing a control signal after receipt of a selected number n of oscillations of the clock signal, said switch means responsive to the control signal to be disposed from its first to its second position, said first counter means responsive to the control signal to terminate operating in its first mode at which time the first output signal represents a first count indicative of the input analog signal and to initiate its second mode to count down the first count, said second counter means responsive to the control signal to initiate counting the oscillations of the clock signal and responsive to the second output signal of a second, predetermined count for terminating counting the oscillations of the clock signal, to provide its third, digital output signal indicative of the input, analog signal and the independent of the frequency of the clock signal. 35. Apparatus as claimed in any preceding claim including an analog to digital converter comprising (a) oscillator means having an input for providing a first output signal whose frequency is dependent upon the signal applied to its input; (b) reference means for generating a reference signal; (c) switch means coupled to said input of said oscillator means and disposable from a first position wherein said switch means applies the input, analog signals to said input of said oscillator means, to a second position wherein said switch means applies the reference signal to said input of said oscillator means; (d) first counter means coupled to receive the first output signal and operable in a first mode to count up and in a second mode to cound down in accordance with the frequency of the first output signal to provide a second output signal;; (e) second counter means coupled to receive selectively the second output signal, for providing a corresponding third digital output signal; (f) clock means for providing a clock signal; and (g) control means coupled to receive the clock signal for providing a control signal after receipt of a selected number n of oscillations of the clock signal, said switch means responsive to the control signal to be disposed from its first to its second position, said first counter means responsive to the control signal to terminate operating in its first mode at which time the first output signal represents a first count indicative of the input analog signal and to initiate its second mode to count down the first count, said second counter means responsive to the control signal to initiate counting the oscillations of

Claim 37

Apparatus for converting inputs analog signals to corresponding digital output signals, said converting apparatus comprising: (a) oscillator means having an input for providing a first output signal whose frequency is dependent upon the signal applied to its input; (b) reference means for generating a reference signal; (c) switch means coupled to said input of said oscillator means and disposable from a first position wherein said switch means applies the input, analog signals to said input of said oscillator means, to a second position wherein said switch means applies the reference signal to said input of said oscillator means; (d) first counter means coupled to receive the first output signal and operable in a first mode to count up and in a second mode to count down in accordance with the frequency of the first output signal to provide a second output signal;; (e) second counter means coupled to receive selectively the second output signal, for providing a corresponding third digital output signal; (f) clock means for providing a clock signal; and (g) control means coupled to receive the clock signal for providing a control signal after receipt of a selected number n of oscillations of the clock signal, said switch means responsive to the control signal to be disposed from its first to its second position, said first counter means responsive to the control signal to terminate operating in its first mode at which time the first output signal represents a first count indicativa of the input analog signal and to initiate its second mode to count down the first count, said second counter means responsive to the control signal to initiate counting the oscillations of the clock signal and responsive to the second output signal of a second, predetermined count for terminating counting the oscillations of the clock signal, to provide its third, digital output signal indicative of the input, analog signal and independent of the frequency of the clock signal. 37. Apparatus as claimed in claim 35 or 36, wherein said control means includes third counter means for counting "n" oscillations of the clock signal and thereafter providing the control signal, said third counter means includes means for variably setting the value of "n". 38. Apparatus as claimed in claim 37, wherein said third counter means includes means for receiving and storing a manifestation of "n". 39. Apparatus as claimed in claim 35 or 36, wherein said control means comprises means responsive to a strobe signal indicative of the presence of input analog signals to be converted, and responsive thereto for activating said oscillator means for a period of time corresponding to that required to permit said first counter to operate in its first and second modes to convert said input analog signals to the corresponding third, digital output signals. 40. Apparatus as claimed in claim 39, wherein said responsive means comprises a ring counter having a first output indicative of the period in which said oscillator means is deactivated, a second output indicative of the first mode of operation of said first counter means and a third output indicative of the second mode of operation of said first counter means. 41. Apparatus as claimed in claim 35 or 36, wherein said previously recited means are implemented in CMOS technology. 42. Heart pacemakers substantially as hereinbefore described with reference to the accompanying drawings. 43. Body-implantable electromedical apparatus including memory means for storing a program of instructions and a microprocessor for executing the program, the microprocessor including address means for addressing the memory, wherein there is included resetting means coupled to said microprocessor for periodically generating a reset signal to reset said address means to a predetermined return address, whereby if said address means inadvertently addresses a meaningless location in said memory means, the execution by said microprocessor of a selected program within said memory will be continued by addressing the predetermined return address within the selected program. 44. Apparatus as claimed in claim 43 wherein said microprocessor includes means coupled to said reset means for periodically generating and applying a defeat command signal to said reset means to defeat the operation of said reset means if said address means is operating correctly. 45. Body implantable electrical apparatus adapted to be coupled via a plurality of leads to body tissue, said apparatus comprising: a) memory means including at least first and second storage portions, each storage portion storing a different program: b) control means for selectively executing one of the programs stored in said memory means, and comprising addressing means for accessing one of said first and second storage portions, and c) means for selectively changing the address of said address means, whereby a different program is addressed by said address means and is executed by said control means. d) means external of the patient's body for transmitting encoded signals for changing the program stored in the memory means. New claims or amendments to claims filed on 24/9/79 Superseded claim 35 New or amended claims: