Claims Analysis
Total Claims: 16
Claim 1
Independent Claim
65 words
A method for operating an Electrically Erasable Programmable Read Only Memory (EEPROM) having a plurality of memory cells, comprising the steps of: erasing a plurality of said memory cells; and performing a recovery step wherein those of said plurality of said memory cells which have been overerased during said step of erasing are made to be less overerased in preparation for a subsequent programming step.
Claim 2
Independent Claim
49 words
A method for operating an EEPROM comprising a plurality of memory cells which in turn comprise a first plurality of overerased memory cells and a second plurality of non-overerased memory cells, comprising the step of recovering said first plurality of overerased memory cells such that they become less overerased.
Claim 3
Independent Claim
62 words
A method for operating an EEPROM comprising a plurality of memory cells which in turn comprise a first plurality of overerased memory cells and a second plurality of non-overerased memory cells, comprising the steps of: performing a recovery step to cause said first plurality of overerased memory cells to become less overerased; and programming said first and second plurality of memory cells.
Claim 4
Dependent Claim
58 words
A method as in claim 1 or 3 wherein each of said memory cells comprises a source, a drain, a control gate, and a floating gate, and said recovery step comprises the step of reducing the floating gate voltage of said overerased cells while substantially not affecting the floating gate voltage of memory cells which are not overerased.
Claim 5
Dependent Claim
46 words
A method as in claim 4 wherein said recovery step comprises the step of causing a relatively high floating gate current to flow in said overerased memory cells, while causing a relatively low floating gate current to flow in those memory cells which are not overerased.
Claim 6
Dependent Claim
34 words
A method as in claim 5 wherein said floating gate current during recovery is greater for cells which are more overerased as compared to the floating gate current through cells which are less overerased.
Claim 7
Dependent Claim
34 words
A method as in claim 1 or 3 wherein said recovery step comprises a programming step performed at a low programming voltage in order to perform said recovery while not programming said memory cells.
Claim 8
Dependent Claim
20 words
A method as in claim 7 wherein said programming voltage is applied to the control gate of said memory cells.
Claim 9
Dependent Claim
28 words
A method as in claim 1 or 3 wherein said step of recovery is performed utilizing a relatively high drain voltage and a relatively low control gate voltage.
Claim 10
Dependent Claim
36 words
A method as in claim 1 or 3 wherein said step of recovery is performed utilizing a relatively low drain voltage and a relatively low control gate voltage in order to reduce drain hot carrier injection.
Claim 11
Dependent Claim
26 words
A method as in claim 9 wherein said subsequent programming step is performed utilizing a relatively high drain voltage and a relatively high control gate voltage.
Claim 12
Dependent Claim
26 words
A method as in claim 10 wherein said subsequent programming step is performed utilizing a relatively high drain voltage and a relatively high control gate voltage.
Claim 13
Dependent Claim
21 words
A method as in claim 9 wherein said step of recovery further utilizes a positive voltage coupled to said floating gate.
Claim 14
Dependent Claim
20 words
A method as in claim 13 wherein said positive voltage is coupled to said floating gate through an erase gate.
Claim 15
Dependent Claim
21 words
A method as in claim 10 wherein said step of recovery further utilizes a positive voltage coupled to said floating gate.
Claim 16
Dependent Claim
20 words
A method as in claim 15 wherein said positive voltage is coupled to said floating gate through an erase gate.