Method of recording data in memory card having eeprom and memory card system using the same

Claim 2

A memory card system using a memory card which has a main memory implemented as a collective erasure type EEPROM, CHARACTERIZED BY a main memory section (10) made up of at least two EEPROMs (1, 2, ..., η) having an identical capacity, at least one of said EEPROMs (1, 2, ..., η) being conditioned for a spare memory in which no data is stored; an address generator (24) for holding a write address of data to be written to said main memory section (10) and generating, when one of said EEPROMs (1, 2, ..., η) corresponding to said write address has already stored data, addresses for copying all of said data stored in a storage location of said one EEPROM except for data stored in said write address in said spare memory; a data control (26) for writing and reading data out of said main memory section (10) and temporarily holding, while data of said one EEPROM are copied in said spare memory in said main memory section (10), data to be written; a chip selection control (28) for selectively feeding an enable signal to one of said EEPROMs (1, 2, ..., η) for writing or reading data and replacing, when data of one of said EEPROMs (1, 2, ..., η) are copied in said spare memory in said main memory section (10), a relative address of said one EEPROM and a relative address of said spare memory; table holding means (34) for storing a memory supervising table which supervises storage conditions of said main memory section (10) when a power source is turned off, and a selection condition of said chip selection control (28) just before the turn-off of said power source; a control signal generator (30) for generating a timing signal for writing data in said EEPROMs (1, 2, ..., η) of said main memory section (10), a timing signal for reading data out of said EEPROMs (1, 2, ..., η), and a timing signal for erasing data stored in said EEPROMs (1, 2, ..., η); and a system control (32) for determining, in response to an input signal or an output signal from a host to or from which data are to be inputted or outputted, conditions of said main memory section (10) on the basis of contents of said memory supervising table to thereby control said main memory section (10), said address generator (24), said data control (26), said chip selection control (28), said table holding means (34), and said control signal generator (30), thereby moving, writing or reading data.

Claim 4

A memory card system using a memory card having a main memory which is implemented as a block erasure type EEPROM, CHARACTERIZED BY a main memory section (100) comprising said EEPROM having a plurality of memory blocks (11, 21, ..., η1) at least one of which is conditioned for a spare block in which no data is stored; a main memory supervising memory (280) for memorizing relative addresses of said memory blocks (11, 21, ..., η1) of said main memory section (100), whether or not each of said memory blocks stores data, and conditions in which said memory blocks hold data; a block selector (260) for reading a logical address sent from a host and selecting one of said memory blocks (11, 21, ..., η1) which is designated by said logical address; and a system control (320) for controlling said main memory section (100), said main memory supervising memory (280), and said block selector (260) in response to a control signal sent from the host; said block selector comprising: decision means for reading and determining, when said logical address is an address for writing, conditions in which data are stored in storage locations of addresses of said memory block stored in said main memory supervising table; replacing means for replacing, when said decision means determines that said memory block stores data, a relative address of said memory block and a relative address of said spare block and then writing said replaced relative addresses in said main memory supervising memory; and selecting means for selecting said memory block which was said spare block as a block designated by said logical address; said system control (320) comprising erasing means for erasing data of said memory block whose address has been converted to the address of said spare block by said repalcing means of said block selector (260).