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EP0372833A2 Expired / Lapsed EP ⏱️ 0.0 years remaining

Apparatus for emulation of electronic hardware system

Assignee: Quickturn Design Systems Inc
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Filing: 1989-11-30
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Granted: —
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Expires: 2009-11-30
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Abstract

Abstract A system for physical emulation of electronic circuits or systems includes a data entry workstation where a user may input data representing the circuit or system configuration. This data is converted to a form suitable for programming an array of programmable gate elements provided with a richly interconnected architecture. Provision is made for externally connecting VLSI devices or other portions of a user's circuit or system. A network of internal probing interconnections is made available by utilization of unused circuit paths in the programmable gate arrays.

Inventors

  • 👤 Stephen Paul Sample
  • 👤 Thomas Stephen Payne
  • 👤 Michael Raymond D'amour

Bibliographic Details

Application Number —
Jurisdiction EP
Data Source google_patents
Last Synchronized 2026-10-23 03:41
CPC Classifications
G; G06; G06F; G06F11/00; G06F11/22; G06F11/26; G06F11/261; G06F30/00; G06F30/30; G06F30/32; G06F30/33; G06F30/3308; G06F30/331

Claims Analysis

Total Claims: 25
Claim 1
Independent Claim 109 words
A configurable hardware system, including: means for entering into said system configuration information representative of an electronic circuit or system to be emulated, means responsive to said configuration information, for creating signals of a first type, programmable circuit and interconnection means, responsive to said signals of a first type, for configuring and interconnecting the hardware elements of the circuit or system to be emulated into a configured circuit or system, means for transferring said signals of a first type to said programmable circuit means, and means for providing testing input signals to, and for obtaining output signals from, said configured circuit or system out of said programmable circuit means.
Claim 2
Dependent Claim 109 words
A configurable hardware system, including: means for entering into said system configuration information representative of an electronic circuit or system to be emulated, means responsive to said configuration information, for creating signals of a first type, programmable circuit and interconnection means, responsive to said signals of a first type, for configuring and interconnecting the hardware elements of the circuit or system to be emulated into a configured circuit or system, means for transferring said signals of a first type to said programmable circuit means, and means for providing testing input signals to, and for obtaining output signals from, said configured circuit or system out of said programmable circuit means.
Claim 3
Dependent Claim 14 words
The system of claim 1, wherein said programmable circuit and interconnection means are reprogrammable.
Claim 4
Dependent Claim 169 words
A configurable hardware system including: means for entering into said system configuration information representative of an electronic circuit or system to be emulated, means responsive to said configuration information, for creating signals of a first type, a matrix of rows and columns of programmable gate array integrated circuits, each of said integrated circuits having a plurality of functional logic elements, a plurality of programmable interconnect paths and a plurality of input/output nodes, wherein a set of signals of said first type acts to cause said programmable interconnect paths to connect selected ones of said functional logic elements to one another, and selected ones of said input/output nodes to one another and to said functional logic elements, said integrated circuits arranged in a plurality of rows and a plurality of columns, means for transferring said signals of a first type to said programmable circuit means, and means for providing testing input signals to, and for obtaining output signals from, said configured circuit or system out of said programmable circuit means.
Claim 5
Dependent Claim 169 words
A configurable hardware system including: means for entering into said system configuration information representative of an electronic circuit or system to be emulated, means responsive to said configuration information, for creating signals of a first type, a matrix of rows and columns of programmable gate array integrated circuits, each of said integrated circuits having a plurality of functional logic elements, a plurality of programmable interconnect paths and a plurality of input/output nodes, wherein a set of signals of said first type acts to cause said programmable interconnect paths to connect selected ones of said functional logic elements to one another, and selected ones of said input/output nodes to one another and to said functional logic elements, said integrated circuits arranged in a plurality of rows and a plurality of columns, means for transferring said signals of a first type to said programmable circuit means, and means for providing testing input signals to, and for obtaining output signals from, said configured circuit or system out of said programmable circuit means.
Claim 6
Dependent Claim 181 words
A configurable hardware system including: means for entering into said system configuration information representative of an electronic circuit or system to be emulated, means responsive to said configuration information, for creating signals of a first type, a three dimensional array of a plurality of planes of matrices of rows and columns of programmable gate array integrated circuits, each of said integrated circuits having a plurality of functional logic elements, a plurality of programmable interconnect paths and a plurality of input/output nodes, wherein a set of signals of said first type acts to cause said programmable interconnect paths to connect selected ones of said functional logic elements to one another, and selected ones of said input/output nodes to one another and to said functional logic elements, said integrated circuits in each plane of said array arranged in a matrix containing a plurality of rows and a plurality of columns, means for transferring said signals of a first type to said programmable circuit means, and means for providing testing input signals to said configured circuit or system out of said programmable circuit means.
Claim 7
Dependent Claim 181 words
A configurable hardware system including: means for entering into said system configuration information representative of an electronic circuit or system to be emulated, means responsive to said configuration information, for creating signals of a first type, a three dimensional array of a plurality of planes of matrices of rows and columns of programmable gate array integrated circuits, each of said integrated circuits having a plurality of functional logic elements, a plurality of programmable interconnect paths and a plurality of input/output nodes, wherein a set of signals of said first type acts to cause said programmable interconnect paths to connect selected ones of said functional logic elements to one another, and selected ones of said input/output nodes to one another and to said functional logic elements, said integrated circuits in each plane of said array arranged in a matrix containing a plurality of rows and a plurality of columns, means for transferring said signals of a first type to said programmable circuit means, and means for providing testing input signals to said configured circuit or system out of said programmable circuit means.
Claim 8
Dependent Claim 192 words
A configurable hardware system including: means for entering into said system configuration information representative of an electronic circuit or system to be emulated, means responsive to said configuration information, for creating signals of a first type, a matrix of rows and columns of programmable gate array integrated circuits, each of said integrated circuits having a plurality of functional logic elements, a plurality of programmable interconnect paths and a plurality of input/output nodes, wherein a set of signals of said first type acts to cause said programmable interconnect paths to connect selected ones of said functional logic elements to one another, and selected ones of said input/output nodes to one another and to said functional logic elements, said integrated circuits arranged in a plurality of rows and a plurality of columns, means for transferring said signals of a first type to said programmable circuit means, and an extra row of said integrated circuits in said matrix having selected ones of their input/output nodes hardwired to selected ones of the input/out nodes of selected ones of integrated circuits in said matrix, having other selected ones of their input/output nodes hardwired to a logic analyser.
Claim 9
Dependent Claim 192 words
A configurable hardware system including: means for entering into said system configuration information representative of an electronic circuit or system to be emulated, means responsive to said configuration information, for creating signals of a first type, a matrix of rows and columns of programmable gate array integrated circuits, each of said integrated circuits having a plurality of functional logic elements, a plurality of programmable interconnect paths and a plurality of input/output nodes, wherein a set of signals of said first type acts to cause said programmable interconnect paths to connect selected ones of said functional logic elements to one another, and selected ones of said input/output nodes to one another and to said functional logic elements, said integrated circuits arranged in a plurality of rows and a plurality of columns, means for transferring said signals of a first type to said programmable circuit means, and an extra row of said integrated circuits in said matrix having selected ones of their input/output nodes hardwired to selected ones of the input/out nodes of selected ones of integrated circuits in said matrix, having other selected ones of their input/output nodes hardwired to a logic analyser.
Claim 10
Dependent Claim 213 words
A configurable hardware system including: means for entering into said system configuration information representative of an electronic circuit or system to be emulated, means responsive to said configuration information, for creating signals of a first type, a three dimensional array of a plurality of planes of matrices of rows and columns of programmable gate array integrated circuits, each of said integrated circuits having a plurality of functional logic elements, a plurality of programmable interconnect paths and a plurality of input/output nodes, wherein a set of signals of said first type acts to cause said programmable interconnect paths to connect selected ones of said functional logic elements to one another, and selected ones of said input/output nodes to one another and to said functional logic elements, said integrated circuits in each plane of said array arranged in a matrix containing a plurality of rows and a plurality of columns, means for transferring said signals of a first type to said programmable circuit means, and an extra row of said integrated circuits in said matrix of said array having selected ones of their input/output nodes hardwired to selected ones of the input/out nodes of selected ones of integrated circuits in said matrix, having other selected ones of their input/output nodes hardwired to a logic analyser.
Claim 11
Dependent Claim 213 words
A configurable hardware system including: means for entering into said system configuration information representative of an electronic circuit or system to be emulated, means responsive to said configuration information, for creating signals of a first type, a three dimensional array of a plurality of planes of matrices of rows and columns of programmable gate array integrated circuits, each of said integrated circuits having a plurality of functional logic elements, a plurality of programmable interconnect paths and a plurality of input/output nodes, wherein a set of signals of said first type acts to cause said programmable interconnect paths to connect selected ones of said functional logic elements to one another, and selected ones of said input/output nodes to one another and to said functional logic elements, said integrated circuits in each plane of said array arranged in a matrix containing a plurality of rows and a plurality of columns, means for transferring said signals of a first type to said programmable circuit means, and an extra row of said integrated circuits in said matrix of said array having selected ones of their input/output nodes hardwired to selected ones of the input/out nodes of selected ones of integrated circuits in said matrix, having other selected ones of their input/output nodes hardwired to a logic analyser.
Claim 12
Dependent Claim 27 words
The system of claim 5 or 6, further including selected ones of said input/output nodes of said extra row of integrated circuits hardwired to a pattern generator.
Claim 13
Independent Claim 52 words
The system of any one of claims 3 to 7, wherein selected ones of said input/output nodes of each one of said integrated circuits in a row of said matrix are hardwired to selected input/output nodes of the ones of said integrated circuits which are its two immediate neighbours in said row.
Claim 14
Independent Claim 109 words
The system of any one of claims 3 to 8, wherein selected ones of said input/output nodes of each one of said integrated circuits in a column of said matrix are hardwired to selected input/output nodes of the ones of said integrated circuits which are its two immediate neighbours in said column and selected input/output nodes of said integrated circuits are hardwired to selected input/output nodes of the two of said integrated circuits which are once removed from its two immediate neighbours in said column, and further wherein selected input/output nodes of the two of said integrated circuits at the ends of said column are hardwired to each other.
Claim 15
Dependent Claim 45 words
The system of claim 9, wherein selected input/output nodes of each of said integrated circuits in a plane are hardwired to selected ones of said input/output nodes of the two of said integrated circuits occupying corresponding positions in the matrix of the immediate neighbour planes.
Claim 16
Independent Claim 92 words
The system of any one of claims 3 to 10, wherein selected ones of said input/output nodes of each one of said integrated circuits in a row of said matrix are hardwired to selected input/output nodes of the ones of said integrated circuits which are its two immediate neighbours in said row, and selected input/output nodes of each of said integrated circuits in a plane are hardwired to selected ones of said input/output nodes of the two of said integrated circuits occupying corresponding positions in the matrix of the immediate neighbour planes.
Claim 17
Independent Claim 35 words
The system of any one of claims 3 to 11, wherein selected ones of said input/output nodes of the two of said integrated circuits at the ends of said row are hardwired to each other.
Claim 18
Independent Claim 34 words
The system of any one of claims 3 to 12, wherein selected input/output nodes of the ones of said integrated circuits which are diagonally adjacent neighbours in said matrix are hardwired to one another.
Claim 19
Independent Claim 17 words
The system of any one of claims 3 to 13, wherein said programmable interconnect paths are reprogrammable.
Claim 20
Independent Claim 21 words
The system of any one of claims 1 to 14, further including means for obtaining output signals from said configured circuit.
Claim 21
Independent Claim 28 words
The system of any one of claims 1 to 15, further including circuit means for selectively observing signals on one or more internal nodes in said configured circuit.
Claim 22
Independent Claim 29 words
The system of any one of claims 1 to 16, further including circuit means for selectively injecting electronic signals into one or more internal nodes in said configured circuit.
Claim 23
Independent Claim 24 words
The system of any one of claims 1 to 17, further including means for incorporating external circuit components or systems into said configured circuit.
Claim 24
Dependent Claim 65 words
The system of claim 18, wherein said means for incorporating external circuit components includes at least one of said integrated circuits, said integrated circuit having selected ones of its input/output nodes hardwired to an external circuit interface and having other selected ones of the input/out nodes hardwired to selected input/output nodes of selected input/output nodes of selected ones of said integrated circuits in said array.
Claim 25
Independent Claim 29 words
The system of any one of claims 1 to 19, further including means for inserting a known time delay in selected signal paths of said configured circuit or system.

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