EP0363547A1
Expired / Lapsed
EP
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Method for etching mirror facets of III-V semiconductor structures
Assignee: International Business Machines Corp
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Filing: 1988-09-12
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Granted: —
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Expires: 2008-09-12
Abstract
Abstract A method for etching mirror facets of semiconductor structures such as laser diodes or waveguides. A multi-layer etch mask is deposited onto the structure. It consists of two photoresist layers, a hard-baked bottom layer (PR bot ) and a soft-baked top layer (PR top ), with an amorphous dielectric intermediate layer (INT) sandwiched inbetween. The etch pattern, lithographically formed in the top resist layer, is successively transferred, first into the intermediate layer and than into the bottom layer. Prior to etching a groove into the semiconductor structure, its walls forming the mirror facets, the intermediate layer (INT) is removed to prevent its erosion. A chemically assisted ion beam etch process (CAIBE) is used to etch the groove, the patterned hard-baked resist layer serving as mask.
Inventors
- 👤 Peter Dr. Buchmann
- 👤 Hans-Peter Dietrich
- 👤 Peter Vettiger
Bibliographic Details
Application Number
—
Jurisdiction
EP
Data Source
google_patents
Last Synchronized
2026-10-23 08:17
CPC Classifications
G; G03; G03F; G03F7/00; G03F7/0035; H; H01; H01S; H01S5/00; H01S5/02; H01S5/028; H10; H10P; H10P50/00; H10P50/20; H10P50/24; H10P50/242; H10P50/69; H10P50/691; H10P50/692; H10P50/693; H10P50/695; H01S5/0201; H01S5/0203; H01S5/0282
Claims Analysis
Total Claims: 17
Claim 1
Independent Claim
243 words
A method for etching mirror facets of III-V compound semiconductor structures such as laser diodes and waveguides, applying an ion beam etch process in which a multi-layer mask is used for mirror definition, the method comprising the steps of - providing a substrate (11) on which the semiconductor structure (10) is deposited, - depositing and hard-baking, at a temperature above 200 ° C, a bottom photoresist layer (PR bot ) onto the upper surface of the laser diode structure, - evaporating an intermediate layer (INT) of an amorphous dielectric material onto the bottom photoresist layer, - depositing and soft-baking, at a temperature below 120 ° C, an imaging photoresist layer (PR top ) onto the intermediate layer, - lithographic patterning of the imaging photoresist layer (PR top ) to define the mirror etch position, - directional dry etching of the exposed areas of the intermediate layer (INT) thereby transferring the pattern from the imaging photoresist layer (PR top ) into the intermediate layer, - directional etching of the exposed areas of the bottom photoresist layer (PR bot ) thereby transferring the pattern from the intermediate layer (INT) into the bottom photoresist layer, - removal of the intermediate layer by dry etching, - applying an ion beam etch process to etch a groove into the semiconductor structure to form the mirror facets, the patterned hard-baked bottom layer (PR bot ) serving as mask, and - removal of the bottom photoresist layer (PR bot ).
Claim 2
Independent Claim
243 words
A method for etching mirror facets of III-V compound semiconductor structures such as laser diodes and waveguides, applying an ion beam etch process in which a multi-layer mask is used for mirror definition, the method comprising the steps of - providing a substrate (11) on which the semiconductor structure (10) is deposited, - depositing and hard-baking, at a temperature above 200 ° C, a bottom photoresist layer (PR bot ) onto the upper surface of the laser diode structure, - evaporating an intermediate layer (INT) of an amorphous dielectric material onto the bottom photoresist layer, - depositing and soft-baking, at a temperature below 120 ° C, an imaging photoresist layer (PR top ) onto the intermediate layer, - lithographic patterning of the imaging photoresist layer (PR top ) to define the mirror etch position, - directional dry etching of the exposed areas of the intermediate layer (INT) thereby transferring the pattern from the imaging photoresist layer (PR top ) into the intermediate layer, - directional etching of the exposed areas of the bottom photoresist layer (PR bot ) thereby transferring the pattern from the intermediate layer (INT) into the bottom photoresist layer, - removal of the intermediate layer by dry etching, - applying an ion beam etch process to etch a groove into the semiconductor structure to form the mirror facets, the patterned hard-baked bottom layer (PR bot ) serving as mask, and - removal of the bottom photoresist layer (PR bot ).
Claim 3
Dependent Claim
13 words
The method of claim 1, wherein the semiconductor structure is an GaAs/AlGaAs laser.
Claim 4
Dependent Claim
17 words
The method of claim 2, wherein the laser is of the graded-index separated confinement heterostructure type (GRINSCH).
Claim 5
Dependent Claim
25 words
The method of claim 2, wherein a chemically assisted ion beam etch (CAIBE) process is used for etching the groove into the laser diode structure.
Claim 6
Dependent Claim
16 words
The method of claim 2, wherein chlorine is used as reactive gas in the etch process.
Claim 7
Dependent Claim
29 words
The method of claim 4, wherein the water pressure in the CAIBE system is below 10⁻⁸ Torr (= 0.1.3x 10⁻⁹ Pa) to achieve non-selective etching of GaAs and AlGaAs.
Claim 8
Dependent Claim
27 words
The method of claim 1, wherein the bottom photoresist layer (PR bot ) is highly resistant in the reactive gas used in the ion beam etch system.
Claim 9
Dependent Claim
29 words
The method of claim 1, wherein the bottom photoresist layer (PR bot ) is highly resistant in chlorine, the etch rate ratio GaAs : photoresist being higher than 30.
Claim 10
Dependent Claim
15 words
The method of claim 1, wherein the intermediate layer (INT) consists of silicon monoxide (SiO).
Claim 11
Dependent Claim
23 words
The method of claim 1, wherein the thickness of the intermediate layer (INT) is less than 200 nm, preferably less than 100 nm.
Claim 12
Dependent Claim
40 words
The method of claim 1, wherein the semiconductor structure is at least partly covered with an insulating layer (16) into which a window is etched during and with the same dry etching process used to remove the intermediate layer (INT).
Claim 13
Independent Claim
178 words
A method for forming multi-layer etch masks for use in the fabrication of opto-electronic semiconductor structures, the method comprising of - depositing and hard-baking, at a temperature above 200 ° C, a bottom photoresist layer (PR bot ) onto the surface of the structure to be etched, - evaporating an intermediate layer (INT) of an amorphous dielectric material onto the bottom layer, - depositing and soft-baking, at a temperature below 120 ° C, an imaging photoresist layer (PR top ) onto the intermediate layer, - lithographic patterning of the imaging photoresist layer (PR top ) to define the pattern to be etched into the semiconductor structure, - directional dry etching of the exposed areas of the intermediate layer (INT) thereby transferring the etch pattern from the imaging photoresist layer (PR top ) into the intermediate layer (INT), - directional dry etching of the exposed areas of the bottom layer (PR bot ) thereby transferring the etch pattern from the intermediate layer (INT) into the bottom photoresist layer, and - removal of the intermediate layer (INT) by dry etching.
Claim 14
Independent Claim
178 words
A method for forming multi-layer etch masks for use in the fabrication of opto-electronic semiconductor structures, the method comprising of - depositing and hard-baking, at a temperature above 200 ° C, a bottom photoresist layer (PR bot ) onto the surface of the structure to be etched, - evaporating an intermediate layer (INT) of an amorphous dielectric material onto the bottom layer, - depositing and soft-baking, at a temperature below 120 ° C, an imaging photoresist layer (PR top ) onto the intermediate layer, - lithographic patterning of the imaging photoresist layer (PR top ) to define the pattern to be etched into the semiconductor structure, - directional dry etching of the exposed areas of the intermediate layer (INT) thereby transferring the etch pattern from the imaging photoresist layer (PR top ) into the intermediate layer (INT), - directional dry etching of the exposed areas of the bottom layer (PR bot ) thereby transferring the etch pattern from the intermediate layer (INT) into the bottom photoresist layer, and - removal of the intermediate layer (INT) by dry etching.
Claim 15
Dependent Claim
29 words
The method of claim 12, wherein the bottom photoresist layer (PR bot ) is highly resistant in chlorine, the etch rate ratio GaAs : photoresist being higher than 30.
Claim 16
Dependent Claim
15 words
The method of claim 12, wherein the intermediate layer (INT) consists of silicon monoxide (SiO).
Claim 17
Dependent Claim
23 words
The method of claim 12, wherein the thickness of the intermediate layer (INT) is less than 200 nm, preferably less than 100 nm.
References Cited (Backward Citations)
DE1622333A1
Cited
WO1980000639A1
Cited
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