Self pre-ageing circuit device for semiconductor memory e.g. application specific memory

Abstract

Abstract The device includes a preaging detector (20) and a memory field (10). Provided with the detector is a data comparator (70), a further preaging detector (21) which produces a signal if preaging conditions are fulfilled, an impulse generator (22), an address counter (24) and a data generator (25). The comparator compares test data which has been read out of the memory field with data output from the detector. Predetermined control signals, address signals and test data are produced by the detector if certain preaging conditions arise. The memory field implements a preaging operation if the test data is written in or read out of a memory cell through an address signal selected according to the control signal. The impulse generator a clock signal according to self preaging test signals applied to it, while the address counter produces an address under use of a clock pulse. A control signal generator produces row and column address signals and read free and write free signals. The data generator reads data from the address and outputs it to the comparator.

Inventors

• 👤 Sam-Soo Kim
• 👤 Young-Hyun Jun

Bibliographic Details